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MP2325 high efficiency 3a , 24v, 500khz synchronous step - down converter MP2325 rev. 1.0 www.monolithicpower.com 1 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. description the MP2325 is a high frequency synchronous rectified step - down switch mode converter with built in internal power mosfets. it offers a very compact solution to achieve 3a continuous output current over a wide input supply range with excellent l oad and line regulation. the MP2325 has synchronous mode operation for higher efficiency over output current load range. current mode operation provides fast transient response and eases loop stabilization. full protection features include ocp and thermal shut down. the MP2325 requires a minimum number of readily available standard external components and is available in a space saving 8 - pin tsot23 package. features ? wide 4 .5 v to 24 v operating input range ? 9 0 m / 40 m low rds(on) internal power mosfets ? l ow quiescent current ? high efficiency synchronous mode operation ? fixed 500k hz switching frequency ? frequency sync from 200khz to 2mhz external clock ? power save mode at light load ? internal soft start ? power good indic a tor ? ocp protection and hiccup ? thermal shu tdown ? output adjustable from 0.8v ? available in an 8 - pin tsot - 23 package applications ? notebook systems and i/o power ? digital set top boxes ? flat panel television and monitors all mps parts are lead - free and adhere to the rohs directive. for mps green status , please visit mps website under products, quality assurance page. mps and the future of analog ic technology are r egistered t rademarks of monolithic power systems, inc. typical application i n e n / s y n c v c c g n d f b s w b s t v i n e n / s y n c c 3 0 . 1 f r 1 4 0 . 2 k r 2 1 2 . 7 k l 1 4 . 9 h c 2 4 4 f c 4 0 . 1 f c 1 2 2 f 2 6 7 1 5 3 8 4 3 . 3 v / 3 a r t 3 3 k v o u t r 4 2 0 m p 2 3 2 5 p g r 3 1 0 0 k
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 2 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. ordering information part number* package top marking MP2325gj tsot23 - 8 ake * for tape & reel, add suffix C z ( e. g. mp 2325 gj C z) ; package reference t s o t 23 - 8 absolute maximum rat ings (1) v in ................................ ............... C 0.3v to + 2 8 v v sw ....... C 0.3v ( - 5v<10ns) to + 2 8 v (30v <10ns) v bst ................................ ...................... v sw +6v all other pins ................................ . - 0.3v to +6 v continuous power dissipation (ta=+25 c) (2) ... ................................ ................................ 1.25 w junction temperature .............................. 150 c lead temperature ................................ ... 260 c storage temperature ................. - 65 c to 150 c recommended operating conditions ( 3 ) supply voltage v in ............................. 4 .5 to 24 v output voltage v out ................. 0.8v to v in *d max ope rating junction temp (t j ) . . - 40c to +125c thermal resistance ( 4 ) ja jc tsot23 - 8... . 100 .. 55.. c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), t he junction - to - ambient thermal resistance ja , and the am bient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max) - t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator wil l go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51 - 7, 4 - layer pcb.
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 3 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical character istics v in = 12 v, t a = 25c , unless otherwise noted. parameter symbol condition min typ max units supply current (shutdown) i in v en = 0v 5.5 a supply current (quiescent) i q v en = 2v, v fb = 1v 1 3 0 180 2 4 0 a hs switch on resistance hs rds - on v bst - sw =5v 9 0 m ls switch on resistance ls rds - on v cc =5v 40 m switch leakage sw lkg v en = 0v, v sw = 12v 1 a current limit (5) i limit duty cycle=4 0% 4.5 5.5 6.5 a oscillator frequency f sw v fb =75 0m v 4 2 0 500 620 k hz fold - back frequency f fb v fb =2 00mv 0. 5 f sw maximum duty cycle d max v fb = 7 5 0mv 90 95 % minimum o n time (5) t o n _min 60 ns sync frequency range f sync 0.2 2 mhz feedback voltage v f b t a = 2 5oc 7 83 791 799 mv feedback current i fb v fb =8 2 0mv 10 50 na en rising threshold v en_rising 1.2 1.4 1.6 v en hysteresis v en_ hys 8 0 150 2 2 0 m v en input current i en v en =2v 1.5 2 2.5 a v en =0 0 50 n a en turn off delay en td - off 6 10 1 4 s power good rising threshold pg vth - hi 0.9 v fb power good falling threshold pg vth - lo 0.85 v fb power good delay pg td 40 s power good sink current capability v pg sink 1ma 0.4 v power good leakage current i pg - leak 1 a vin under voltage lockout threshold - rising inuv vth 3.7 3. 9 4 .1 v vin under voltage lockout threshold - hysteresis inuv hys 550 6 5 0 750 mv vcc regulator v cc 4. 65 4.9 5. 1 5 v vcc load regulation i cc =5ma 0 1 3 % sof t - start period t ss 0.8 1.5 2 .2 ms thermal shutdown (5) 150 oc thermal hysteresis (5) 20 oc notes: 5) guaranteed by design
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 4 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical characterist ics v in = 1 2 v, v out = 3.3 v, l = 4.9 h, t a = 25c, unless otherwise noted.
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 5 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performance character istics v in = 1 2 v, v out = 3.3 v , l = 4. 9 h, t a = 25c, unless otherwise noted.
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 6 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performance characteristics (continued) v in = 12 v , v out = 3.3 v , l = 4. 9 h, t a = 25c, unless otherwise noted.
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 7 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. pin functions package pin # name description 1 pg power good output. the output of this pin is an open drain . i t s pulled up to vcc by external resistor when the output voltage exceeds 90% of the normal voltage. there is a 40 s delay between fb90% to the pg pin goes high. 2 in supply voltage. the in pin suppl ies power for internal mosfet and regulator. the MP2325 operates from a +4.5v to + 24 v input rail. requires a low - esr, and low inductance capacitor (c1) to decouple the input rail. place the input capacitor very close to this pin and connect it with wide pc b traces and multiple vias. 3 sw switch output. connect to the inductor and bootstrap capacitor. this pin is driven up to vin by the high - side switch during the pwm duty cycle on time. the inductor current drives the sw pin negative during the off time. t he on resistance of the low - side switch and the internal body diode fixes the negative voltage. connect using wide pcb traces and multiple vias. 4 gnd system ground. this pin is the reference ground of the regulated output voltage. for this reason care mu st be taken in pcb layout. suggested to be connected to gnd with copper and vias. 5 bst bootstrap. a capacitor and a 20 resistor connected between sw and bs t pins are required to form a floating supply across the high - side switch driver. 6 en/sync en=1 to enable the MP2325 . external clock can be applied to en pin for changing switching frequency. for automatic start - up, connect en pin to vin with a 100k resistor. 7 vcc bias supply. decouple with 0.1 f - 0.22 f cap. and the capacitance should be no more than 0.22 f 8 fb feedback. an external resistor divider from the output to gnd, tapped to the fb pin, sets the output vo ltage. to prevent current limit run away during a short circuit fault condition the frequency fold - back comparator lowers the oscillator frequency when the fb voltage is below 400mv.
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 8 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. function block diagr am f igure 1 : functional block diagram
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 9 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation the MP2325 is a high frequency synchronous rectified step - down switch mode converter with built in internal power mosfets. it offers a very compact solution to achieve 3a continuous output current over a wide input supply range wi th excellent load and line regulation. the MP2325 operates in a fixed frequency, peak current control mode to regulate the output voltage. a pwm cycle is initiated by the internal clock. the integrated high - side power mosfet is turned on and remains on unt il its current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if, in 9 5 % of one pwm period, the current in the power mosfet does not reach the comp set current value, the power mos fet will be forced to turn off. internal regulator most of the internal circuitries are powered from the 5v internal regulator. this regulator takes the vin input and operates in the full vin range. when vin is greater than 5.0v, the output of the regulato r is in full regulation. when vin is lower than 5.0v, the output decreases, a 0.1uf ceramic capacitor for decoupling purpose is required. error amplifier the error amplifier compares the fb pin voltage with the internal 0.8v reference (ref) and outputs a c omp voltage, which is used to control the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control loop design. power save mode for light load condition the MP2325 has aam (advanc ed asynchronous modulation) power - save mode for light loa d. under the heavy load condition, the v comp is higher than v aam . when the clock goes high, the high - side power mosfet turns on and remains on until v ilsense reaches the value set by the comp voltage . the internal clock resets every time when v comp is higher than v aam . under the light load condition, the value of v comp is low. when v comp is less than v aam and v fb is less than v ref , v comp ramps up until it exceeds v aam . during this time, the internal clock is blocked, thus the MP2325 skips some pulses for pfm (pulse frequency modulation) mode and achieves the light load power save. figure 2 : simplified aam control logic f or v in =12v, v out =3.3v, l= 4. 9 h , the inductor peak current set internally is about 500 ma at light load . the aam voltage internally is varied with duty cycle for keeping the inductor peak current constant. figure 3 : aam selection for common output voltages (v in =4.5v - 24v) enable/sync control en is a digital control pin that turns the regulator on and off. drive en high to turn on the regulator, drive it low to turn it off. there is an internal 1meg resistor from en to gnd thus en can be floated to shut down the chip. also en pin volta ge was clamped to around 6.5v by an internal zener - diode. please use large enough pull up resistor connecting between vin and en to limit the en input current which should be less than 100ua. generally, around 4 3 3 k
MP2325 C 24v, 3a sync step do wn converter MP2325 rev. 1.0 www.monolithicpower.com 10 12/4/2013 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserve d. 100k resistor should be large enough for all t he applications. the chip can be synchronize d to external clock range from 2 00khz up to 2mhz through this pin 2ms right after output voltage is set, with the internal clock rising edge synchronized to the external clock rising edge. en synchronize logic hi gh voltage should higher than 2v. en synchronize logic low voltage should lower than 400mv. en logic high pulse width must less than 1.6 s. otherwise the internal clock may come and turn on high side mosfet again. en logic low pulse width must less than 6 s , o therwise MP2325 may en shutdown. power good indicator the MP2325 has an open drain pin for power good indicator. when fb pin is higher than 90% of regulation voltage, pg pin is pulled up to vcc by the external resistor. if fb pin voltage drop down to 8 5 % of the regulation voltage, pg pin is pulled down to ground by an internal mos fet. under - voltage lockout (uvlo) under - voltage lockout (uvlo) is implemented to protect the chip from operating at insufficient supply voltage. the MP2325 uvlo comparator mo nitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 3.9 v while its falling threshold is consistent 3. 25 v. internal soft - start the soft start is implemented to prevent the converter output voltage from overshooting d uring start up. when the chip starts, the internal circuitry generates a soft - start voltage (ss) ramping up from 0v. the soft - start period lasts until the voltage on the soft - start capacitor exceeds the reference voltage of 0.8v. at this point the referenc e voltage takes over. the soft - start time is internally set to be around 1.5ms. over - current - protection and hiccup the MP2325 has cycle - by - cycle over current limit when the inductor current peak value exceeds the set current limit threshold. meanwhile, out put voltage starts to drop until fb is below the under - voltage (uv) threshold, typically 5 0% below the reference. once a uv is triggered, the MP2325 enters hiccup mode to periodically restart the part. this protection mode is especially useful when the out put is dead - short to ground. the average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. the MP2325 exits the hiccup mode once the over current condition is removed. thermal shutdown thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. when the silicon die temperature is higher than 150c, it shuts down the whole chip. when the temperature is lower than its lower threshold, typically 130c, the chip is enab led again. floating driver and bootstrap charging the floating power mosfet driver is powered by an external bootstrap capacitor. this floating driver has its own uvlo protection. this uvlos rising threshold is 2.2v with a hysteresis of 150mv. the bootstr ap capacitor voltage is regulated internally by vin through d1, r5 , c 5 , l1 and c2 (figure 4 ). if (vin - vsw) is more than 5v, u 1 will regulate m 1 to mai ntain a 5v bst voltage across c 5 . figure 4 : internal bootstrap charging circu it startup and shutdown if both v in and en are higher than their appropriate thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provide s stable supply for the remaining circuitries. three events can shut down the chip: en low, vin low and thermal shutdown. in the shutdown procedure, the signaling path is first blocked to 5 r 5
MP2325 C 24v, 3a sync step do wn converter MP2325 rev. 1.0 www.monolithicpower.com 11 12/4/2013 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserve d. avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command.
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 12 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. application informat ion component selection setting the output voltage the external resistor divider is used to set the output voltage (see typical application on pag e 1). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor (see typical application on page 1). r2 is then given by: the t - type network is highly recommended, as figure 5 shows. fi gure 5 : t - type network table 1 lists the recommended t - type resistors value for common output voltages. table 1 resistor selection for common output voltages v out (v) r1(k?) r2(k?) r t (k?) l ( h ) cf ( f) 1 20.5 76.8 100 1.8 15 1.2 20.5 39.2 100 1.8 15 1. 8 40.2 31.6 5 6 3.3 15 2.5 40.2 18.7 5 6 3.3 15 3.3 40.2 12.7 33 4. 9 15 5 40.2 7.5 33 4. 9 15 selecting the inductor a 1h to 22 h inductor with a dc current rating of at least 25% percent higher than the maximum load current is recommended for most appli cations. for highest efficiency, the inductor dc resistance should be less than 15m?. for most designs, the inductance value can be derived from the following equation. where i l is the inductor ripple current. choose inductor curre nt to be approximately 30% o f the maximum load current . the maximum inductor peak current is: under light load conditions below 100ma, larger inductance is recommended for improved efficiency . selecting the input capacitor the input current to the step - down converter is discontinuous, therefore a capacitor is required to supply the ac current to the step - down converter while maintaining the dc input voltage. use low esr capacitors for the best performance. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for most applications, a 22f capacitor is sufficient. since the input capacitor (c1) absorbs the input switching current it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: the worse case condition occurs at vin = 2vout, where: for simplification, choose the input capacitor whose rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1f, should be placed as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by capacitance can be estimated by: out r1 r2 v 1 0.8v ? ? out in out 1 in l osc v (v v ) l v i f ?? ? ? ? ? 2 i i i l load ) max ( l ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? in out in out load 1 c v v 1 v v i i 2 i i load 1 c ? load out out in in s in i v v v1 f c1 v v ?? ? ? ? ? ? ?? ? ??
MP2325 C 24v, 3a sync step do wn converter MP2325 rev. 1.0 www.monolithicpower.com 13 12/4/2013 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserve d. selecting the outpu t capacitor the output capacitor (c2) is required to maintain the dc output voltage. ceramic, tantalum, or low esr electrolytic capacitors are recommended. low esr capacitors are preferred to keep the output voltage ripple low. the output voltage ripple ca n be estimated by: where l 1 is the inductor value and resr is the equivalent series resistance (esr) value of the output capacitor. in the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capa citance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated by: in the case of tantalum or electrolytic capacitors, the esr dominates the impedance at the swi tching frequency. for simplification, the output ripple can be approximated to: the characteristics of the output capacitor also affect the stability of the regulation system. the mp 232 5 can be optimized for a wide range of capacitan ce and esr values. external bootstrap diode an external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external bst diode are: ? v out is 5 v or 3.3v; ? duty cycle is high: d= >65% in these cases, an external bst diode is recommended from the vcc pin to bst pin, as shown in figure 6 . figure 6 : add optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4 148, and the bst cap is 0.1 f 1f. pc board layout (6) pcb layout is very important to achieve stable operation. please follow these guidelines and take figure 7 as reference . 1) keep the connection of input ground and gnd pin as short and wide as possible. 2) keep the connection of input capacitor and in pin as short and wide as possible. 3) ensure all feedback connections are short and direct. place the feedback resistors and compensation components as close to the chip as possible. 4) route sw away from sensitive analog areas suc h as fb. notes: 6) the recommended layout is based on the figure 8 typical application circuit on the next page. out out out esr s 1 in s vv 1 v 1 r f l v 8 f c2 ?? ?? ? ? ? ? ? ? ?? ?? ? ? ? ?? ?? out out out 2 in s1 vv v 1 v 8 f l c2 ?? ? ? ? ?? ? ? ? ?? out out out esr in s1 vv v 1 r f l v ?? ? ? ? ? ?? ? ?? in out v v r b s t m p 2 3 2 5
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 14 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. figure 7 : sample board layout design example below is a design example following the application guidelines f or the specifications: table 2 : design example v in 1 9 v v out 5 v i o 3a the detailed application schematic s are shown in figure s 8 through 1 3. the typical performance and circuit waveforms have been shown in the typical performance characteristics section. for more device applications, please refer to the related evaluation board datasheets. 8 7 6 5 l 1 c 2 c 1 c 1 a r 4 r 2 r 3 c 4 c 5 1 2 3 4 v i n g n d v o u t s w g n d g n d s w b s t c 3 r 1 r 6 g n d v o u t r 5 e n / s y n c v c c c 2 a
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 15 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical application circuits figure 8 : vo=5v, io=3a figure 9 : vo=3.3v, io=3a figure 10 : vo=2.5v, io=3a m p 2 3 2 5 c 1 0 . 1 u f c 1 a 2 2 u f c 5 0 . 1 u f r 5 1 0 0 k r 4 1 0 0 k r 3 2 0 c 4 0 . 1 u f l 1 4 . 9 u h c 2 a 2 2 u f c 2 2 2 u f r 6 3 3 k r 1 4 0 . 2 k r 2 7 . 5 k c 3 1 5 p f 5 v / 3 a u 1 i n v c c p g e n f b s w b s t g n d c 1 0 . 1 u f c 1 a 2 2 u f c 5 0 . 1 u f r 5 1 0 0 k r 4 1 0 0 k r 3 2 0 c 4 0 . 1 u f l 1 4 . 9 u h c 2 a 2 2 u f c 2 2 2 u f r 6 3 3 k r 1 4 0 . 2 k r 2 1 2 . 7 k c 3 1 5 p f 3 . 3 v / 3 a u 1 m p 2 3 2 5 i n v c c e n f b s w b s t g n d p g c 1 0 . 1 u f c 1 a 2 2 u f c 5 0 . 1 u f r 5 1 0 0 k r 4 1 0 0 k r 3 2 0 c 4 0 . 1 u f l 1 3 . 3 u h c 2 a 2 2 u f c 2 2 2 u f r 6 5 6 k r 1 4 0 . 2 k r 2 1 8 . 7 k c 3 1 5 p f 2 . 5 v / 3 a u 1 i n v c c e n f b s w b s t g n d m p 2 3 2 5 p g
MP2325 C 24v , 3a sync step down converter MP2325 rev. 1.0 www.monolithicpower.com 16 12/4/2013 mps proprietary inform ation. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. figure 11 : vo=1.8v, io=3a figure 12 : vo=1.2v, io=3a figure 13 : vo=1v, io=3a c 1 0 . 1 u f c 1 a 2 2 u f c 5 0 . 1 u f r 5 1 0 0 k r 4 1 0 0 k r 3 2 0 c 4 0 . 1 u f l 1 3 . 3 u h c 2 a 2 2 u f c 2 2 2 u f r 6 5 6 k r 1 4 0 . 2 k r 2 3 1 . 6 k c 3 1 5 p f 1 . 8 v / 3 a u 1 i n v c c e n f b s w b s t g n d m p 2 3 2 5 p g c 1 0 . 1 u f c 1 a 2 2 u f c 5 0 . 1 u f r 5 1 0 0 k r 4 1 0 0 k r 3 2 0 c 4 0 . 1 u f l 1 1 . 8 u h c 2 a 2 2 u f c 2 2 2 u f r 6 1 0 0 k r 1 2 0 . 5 k r 2 3 9 . 2 k c 3 1 5 p f 1 . 2 v / 3 a u 1 i n v c c e n f b s w b s t g n d m p 2 3 2 5 p g c 1 0 . 1 u f c 1 a 2 2 u f c 5 0 . 1 u f r 5 1 0 0 k r 4 1 0 0 k r 3 2 0 c 4 0 . 1 u f l 1 1 . 8 u h c 2 a 2 2 u f c 2 2 2 u f r 6 1 0 0 k r 1 2 0 . 5 k r 2 7 6 . 8 k c 3 1 5 p f 1 v / 3 a u 1 i n v c c e n f b s w b s t g n d m p 2 3 2 5 p g
MP2325 C 24v , 3a sync step down converter notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property r ights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP2325 rev. 1.0 www.monolithicpower.com 17 12/4/2013 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. package information tsot23 - 8 p a c k a g e o u t l i n e d r a w i n g f o r 8 l t s o t 2 3 m f - p o - d - 0 1 0 5 r e v i s i o n 3 . 0 f r o n t v i e w n o t e : 1 ) a l l d i m e n s i o n s a r e i n m i l l i m e t e r s . 2 ) p a c k a g e l e n g t h d o e s n o t i n c l u d e m o l d f l a s h , p r o t r u s i o n o r g a t e b u r r . 3 ) p a c k a g e w i d t h d o e s n o t i n c l u d e i n t e r l e a d f l a s h o r p r o t r u s i o n . 4 ) l e a d c o p l a n a r i t y ( b o t t o m o f l e a d s a f t e r f o r m i n g ) s h a l l b e 0 . 1 0 m i l l i m e t e r s m a x . 5 ) j e d e c r e f e r e n c e i s m o - 1 9 3 , v a r i a t i o n b a . 6 ) d r a w i n g i s n o t t o s c a l e . 7 ) p i n 1 i s l o w e r l e f t p i n w h e n r e a d i n g t o p m a r k f r o m l e f t t o r i g h t , ( s e e e x a m p l e t o p m a r k ) t o p v i e w r e c o m m e n d e d l a n d p a t t e r n s e a t i n g p l a n e s i d e v i e w d e t a i l ' ' a ' ' s e e d e t a i l ' ' a ' ' i a a a a p i n 1 i d s e e n o t e 7 e x a m p l e t o p m a r k

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